Along with further advances and growth in information processing technology and information communication technology has come the need for processing more and more information faster than before. In recent years, for example, the process of error correction in information processing has been required to handle data of longer bit lengths than ever before.
Such error correction requires performing the exclusive-OR (XOR or EOR) operation between the bits that are inputted typically for parity check. Logic operation devices for performing the exclusive-OR operation on the data of long bit lengths have been formed traditionally by combining 2-input XOR circuits. For example, FIG. 11 shows a typical logic operation device that performs the exclusive-OR operation on 32-bit-long data.
As shown in FIG. 11, this logic operation device for performing the exclusive-OR operation on 32-bit-long data has four 8-input XOR circuits 100 and three 2-input XOR circuits 200. Each 8-input XOR circuit 100 has seven 2-input XOR circuits 200 inside.
An example of the multiple-input (3-input) XOR gate is disclosed in NPL 1.